Please use this identifier to cite or link to this item: http://148.72.244.84:8080/xmlui/handle/xmlui/2978
Full metadata record
DC FieldValueLanguage
dc.contributor.authorAdham Hadi Saleh-
dc.date.accessioned2023-10-11T09:25:46Z-
dc.date.available2023-10-11T09:25:46Z-
dc.date.issued2015-
dc.identifier.citationhttps://djes.info/index.php/djesen_US
dc.identifier.issn1999-8716-
dc.identifier.urihttp://148.72.244.84:8080/xmlui/handle/xmlui/2978-
dc.description.abstractHamming code is an efficient error detection and correction technique which can be used to detect single and burst errors, and correct errors. In communication system information data transferred from source to destination by channel, which may be corrupted due to a noise. So to find original information we use Hamming code. In this paper, we have described how we can generate 7 redundancy bit for 64 bit information data. These redundancy bits are to be interspersed at the bit positions (n = 1, 2, 4, 8, 16, 32 and 64) of the original data bits, so to transmit 64 bit information data we need 7 redundancy bit generated by even parity check method to make 71 bit data string. At the destination receiver point, we receive 71 bit data, this receives data may be corrupted due to noise. In Hamming technique the receiver will decided if data have an error or not, so if it detected the error it will find the position of the error bit and corrects it. This paper presents the design of the transmitter and the receiver with Hamming code redundancy technique using VHDL. The Xilinx ISE 10.1 Simulator was used for simulating VHDL code for both the transmitter and receiver sides.en_US
dc.language.isoenen_US
dc.publisherUniversity of Diyala – College of Engineeringen_US
dc.subjectHamming Codeen_US
dc.subjectError Correctionen_US
dc.subjectError Detectionen_US
dc.subjectEven Parityen_US
dc.subjectCheck Methoden_US
dc.subjectRedundancy Bitsen_US
dc.subjectVHDL Languageen_US
dc.subjectXilinx ISE 10.1 Simulatoren_US
dc.titleDesign of Hamming Code For 64 Bit Single Error Detection and Correction Using VHDLen_US
dc.typeArticleen_US
Appears in Collections:مجلة ديالى للعلوم الهندسية / Diyala Journal of Engineering Sciences (DJES)

Files in This Item:
File Description SizeFormat 
297-2.docx2.32 MBMicrosoft Word XMLView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.